PIC16F1825-E/ML【PDF 20/208 页】MCU PIC 14K FLASH 1K RAM 16QFN

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140

ATmega8515(L)

2512K–AVR–01/10

Frame Formats

A serial frame is defined to be one character of data bits with synchronization bits (start

and stop bits), and optionally a parity bit for error checking. The USART accepts all 30

combinations of the following as valid frame formats:

1 start bit

5, 6, 7, 8, or 9 data bits

no, even or odd parity bit

1 or 2 stop bits

A frame starts with the start bit followed by the least significant data bit. Then the next

data bits, up to a total of nine, are succeeding, ending with the most significant bit. If

enabled, the parity bit is inserted after the data bits, before the stop bits. When a com-

plete frame is transmitted, it can be directly followed by a new frame, or the

communication line can be set to an idle (high) state. Figure 67 illustrates the possible

combinations of the frame formats. Bits inside brackets are optional.

Figure 67. Frame Formats

Start bit, always low

(n)

Data bits (0 to 8)

Parity bit. Can be odd or even

Stop bit, always high

IDLE

No transfers on the communication line (RxD or TxD). An IDLE line must be

high.

The frame format used by the USART is set by the UCSZ2:0, UPM1:0 and USBS bits in

UCSRB and UCSRC. The Receiver and Transmitter use the same setting. Note that

changing the setting of any of these bits will corrupt all ongoing communication for both

the Receiver and Transmitter.

The USART Character SiZe (UCSZ2:0) bits select the number of data bits in the frame.

The USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selec-

tion between one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The

Receiver ignores the second stop bit. An FE (Frame Error) will therefore only be

detected in the cases where the first stop bit is zero.

Parity Bit Calculation

The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is

used, the result of the exclusive or is inverted. The relation between the parity bit and

data bits is as follows::

even

Parity bit using even parity

odd

Parity bit using odd parity

Data bit n of the character

[5]

[6]

[7]

[8]

[P]

Sp1 [Sp2]

(St / IDLE)

(IDLE)

FRAME

even

–

…

odd

⊕

⊕⊕⊕⊕⊕

–

…

⊕

⊕⊕⊕⊕⊕

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